SAA7114H |
RFQ for SAA7114H Required Field |
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| Technical/Catalog Information | SAA7114H/V2,518 |
| Vendor | NXP Semiconductors |
| Category | Integrated Circuits (ICs) |
| Type | Video Decoder |
| Applications | Desktop, Processing, Video |
| Mounting Type | Surface Mount |
| Package / Case | 100-LQFP |
| Voltage - Supply, Analog | 3.1 V ~ 3.5 V |
| Voltage - Supply, Digital | 3.0V ~ 3.6V |
| Packaging | Tape & Reel (TR) |
| Drawing Number | 568; SOT407; ; |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | SAA7114H V2,518 SAA7114HV2,518 |
| Product | Manufacturers | Pack | D/C |
| SAA7114H | - | QFP | 06+ |
The SAA7114H is a video capture device for applications at the image port of VGA controllers.
The SAA7114H is a combination of a two-channel analog preprocessing circuit including source selection, anti-aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard decoder containing two-dimensional chrominance/luminance separation by an adaptive comb filter and a high performance scaler, including variable horizontal and vertical up and down scaling and a brightness, contrast and saturation control circuit.
It is a highly integrated circuit for desktop video applications. The decoder is based on the principle of line-locked clock decoding and is able to decode the colour of PAL, SECAM and NTSC signals into ITU 601 compatible colour component values. The SAA7114H accepts as analog inputs CVBS or S-video (Y/C) from TV or VCR sources, including weak and distorted signals. An expansion port (X-port) for digital video (bi-directional half duplex, D1 compatible) is also supported to connect to MPEG or video phone codec. At the so called image port (I-port) the SAA7114H supports 8 or 16-bit wide output data with auxiliary reference data for interfacing to VGA controllers.
The target application for SAA7114H is to capture and scale video images, to be provided as digital video stream
through the image port of a VGA controller, for display via VGA's frame buffer, or for capture to system memory.
In parallel SAA7114H incorporates also provisions for capturing the serially coded data in the vertical blanking interval (VBI-data). Two principal functions are available:
1. To capture raw video samples, after interpolation to the required output data rate, via the scaler
2. A versatile data slicer (data recovery) unit.
SAA7114H incorporates also a field locked audio clock generation. This function ensures that there is always the same number o
Typical Application |
Features |
| · Desktop video· Multimedia· Digital television· Image processing· Video phone applications. | 1.1 Video decoder` Six analog inputs, internal analog source selectors, e.g. 6 * CVBS or (2 * Y/C and 2 * CVBS) or (1 * Y/C and 4 * CVBS)` Two analog preprocessing channels in differential CMOS style inclusive built-in analog anti-alias filters` Fully programmable static gain or Automatic Gain Control (AGC) for the selected CVBS or Y/C channel` Automatic Clamp Control (ACC) for CVBS, Y and C` Switchable white peak control` Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C signals are available on the expansion port` On-chip line-locked clock generation according "ITU 601"` Digital PLL for synchronization and clock generation from all standards and non-standard video sources e.g. consumer grade VTR` Requires only one crystal (32.11 or 24.576 MHz) for all standards` Horizontal and vertical sync detection` Automatic detection of 50 and 60 Hz field frequency, and automatic switching between PAL and NTSC standards` Luminance and chrominance signal processing for PAL BGDHIN, combination PAL N, PAL M, NTSC M, NTSC-Japan, NTSC 4.43 and SECAM` Adaptive 2/4-line comb filter for two dimensional chrominance/luminance separation Increased luminance and chrominance bandwidth for all PAL and NTSC standards Reduced cross colour and cross luminance artefacts` PAL delay line for correcting PAL phase errors` Independent Brightness Contrast Saturation (BCS) adjustment for decoder part` User programmable sharpness control` Independent gain and offset adjustment for raw data path.1.2 Video scaler` Horizontal and vertical down-scaling and up-scaling to randomly sized windows` Horizontal and vertical scaling range: variable z |
| SYMBOL | PARAMETER | CONDITIONS | MIN. | MAX. | UNIT |
| VDDD | digital supply voltage | -0.5 | +4.6 | V | |
| VDDA | analog supply voltage | -0.5 | +4.6 | V | |
| VIA | input voltage at analog inputs | -0.5 | VDDA + 0.5(1) | V | |
| VOA | output voltage at analog output | -0.5 | VDDA + 0.5 | V | |
| VID | input voltage at digital inputs and outputs | outputs in 3-state; note 2 |
-0.5 | +5.5 | V |
| VOD | output voltage at digital outputs | outputs active | -0.5 | VDDD + 0.5 | V |
| VSS | voltage difference between VSSAn and VSSDn | - | 100 | mV | |
| Tstg | storage temperature | -65 | +150 | °C | |
| Tamb | operating ambient temperature | 0 | 70 | °C | |
| Tamb(bias) | operating ambient temperature under bias | -10 | +80 | °C | |
| Vesd | electrostatic discharge all pins | note 3 | -2000 | +2000 | V |
